Part Number Hot Search : 
S125HN PG1264 RKS1K75E FTD2017M 062K102 1040405 LVB14A ADS12
Product Description
Full Text Search
 

To Download MAX5480 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 19-1300; Rev 0; 10/97
8-Bit Parallel DAC in QSOP-16 Package
_______________General Description
The MAX5480 is a CMOS, 8-bit digital-to-analog converter (DAC) that interfaces directly with most microprocessors. On-chip input latches make the DAC load cycle interface similar to a RAM write cycle, where CS and WR are the only control inputs required. Linearity of 1/2LSB is guaranteed, and power consumption is less than 500W. Monotonicity is guaranteed over the full operating temperature range. The MAX5480 can be operated in either voltage-output or current-output mode. It is available in a small 16-pin QSOP package.
____________________________Features
o QSOP-16 Package (same footprint as SO-8) o Single +5V Supply Operation o VOUT or IOUT Operation o 8-Bit Parallel Interface o Guaranteed Monotonic Over Temperature o Low Power Consumption--100A max o 1/2LSB Linearity Over Temperature
MAX5480
________________________Applications
Digitally Adjusted Power Supplies Programmable Gain Automatic Test Equipment Portable, Battery-Powered Instruments VCO Frequency Control RF Transmit Control in Portable Radios
______________Ordering Information
PART MAX5480ACEE MAX5480BCEE MAX5480AEEE MAX5480BEEE TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C PINPACKAGE 16 QSOP 16 QSOP 16 QSOP 16 QSOP ERROR (LSB) 1/2 1/2 1/2 1/2
__________Typical Operating Circuit
__________________Pin Configuration
VREF
VDD
TOP VIEW
15 REF DATA INPUTS 4-11 D7-D0 12 13
R1 2k
14 VDD RFB
16 1
R2 1k 10pF
MAX4330
OUT1 1 OUT2 2 GND 3 D7 (MSB) 4 VOUT D6 5 D5 6 D4 7 D3 8
16 RFB 15 REF 14 VDD
OUT1 OUT2
MAX5480
13 WR 12 CS 11 D0 (LSB) 10 D1 9 D2
CS WR
MAX5480
GND 3
2
R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
QSOP
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
8-Bit Parallel DAC in QSOP-16 Package MAX5480
ABSOLUTE MAXIMUM RATINGS
VDD to GND ............................................................-0.3V to +17V REF to GND .........................................................................25V RFB to GND .........................................................................25V Digital Inputs to GND .................................-0.3V to (VDD + 0.3V) OUT1, OUT2 to GND................................................-0.3V to VDD Operating Temperature Ranges MAX5480_CEE....................................................0C to +70C MAX5480_EEE .................................................-40C to +85C Storage Temperature Range .............................-65C to +160C Continuous Power Dissipation (TA = +70C) MAX5480_ _EE (derate 8.3mW/C above +70C) ........667mW Lead Temperature (soldering 10sec) ..............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +5V, VREF = +10V, VOUT1 = VOUT2 = 0V, Circuit of Figure 1, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER DC ACCURACY Resolution Relative Accuracy Differential Nonlinearity Gain Error (Note 1) Gain Temperature Coefficient (Note 2) MAX5480A (Note 3) Supply Rejection PSR MAX5480B Output Leakage Current (IOUT1) Output Leakage Current (IOUT2) REFERENCE INPUT Input Resistance DYNAMIC PERFORMANCE D0-D7 = 0V to VDD or VDD to 0V, WR = CS = 0V, OUT1 load = 100 || 13pF VREF = 10V, 100kHz sine wave, WR = CS = 0V MAX5480A (Note 3) TA = +25C TA = TMIN to TMAX 250 0.25 0.5 0.1 120 30 30 120 ns 400 500 ns RREF pin 15 to GND 5 10 20 k VREF = 10V DAC code = full scale VREF = 10V DAC code = zero scale TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX INL DNL All grades guaranteed monotonic over temperature TA = TMIN to TMAX 1 2 0.002 0.01 0.002 0.01 50 400 50 400 nA nA 0.08 0.16 %FSR/% 8 1/2 1 Bits LSB LSB LSB ppm/C SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Current Settling Time to 1/2LSB
MAX5480B TA = +25C MAX5480A TA = +25C (Note 3) TA = TMIN to TMAX MAX5480B TA = +25C
AC Feedthrough (OUT1 or OUT2) ANALOG OUTPUTS OUT1 Capacitance (Note 3) OUT2 Capacitance (Note 3) COUT1 COUT2
D0-D7 = VDD, WR = CS = 0V D0-D7 = 0V, WR = CS = 0V D0-D7 = VDD, WR = CS = 0V D0-D7 = 0V, WR = CS = 0V
pF pF
2
_______________________________________________________________________________________
8-Bit Parallel DAC in QSOP-16 Package
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V, VREF = +10V, VOUT1 = VOUT2 = 0V, Circuit of Figure 1, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance (Note 3) POWER REQUIREMENTS Supply Current IDD Digital inputs at 0V or VDD TA = +25C TA = TMIN to TMAX 220 35 0 0 220 35 170 55 10 -7 100 500 A VIH VIL IIN CIN TA = +25C; VIN = 0V to VDD TA = TMIN to TMAX D0-D7 WR, CS 2.4 0.8 1 10 8 20 V V A pF SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5480
SWITCHING CHARACTERISTICS (Figure 4) Chip-Select to WriteSetup Time Chip-Select to WriteHold Time Write Pulse Width Data-Setup Time Data-Hold Time tCS tCH tWR tDS tDH MAX5480A MAX5480B MAX5480A MAX5480B MAX5480A MAX5480B MAX5480A MAX5480B MAX5480A MAX5480B ns ns ns ns ns
Note 1: Gain error is measured using internal feedback resistor. Full-scale range (FSR) = VREF. Note 2: Gain TempCo measured from +25C to TMAX and from +25C to TMIN. Note 3: Guaranteed by design.
______________________________________________________________Pin Description
PIN 1 2 3 4-11 12 13 14 15 16 NAME OUT1 OUT2 GND D7-D0 CS WR VDD REF RFB R-2R Ladder Output R-2R Ladder Output, complement of OUT1 Ground Data Inputs, D7 is the most significant bit. Chip Select Input. Active Low. Write Control Input. Active Low. Power Supply Input, +5V Reference Voltage Input Feedback Resistor Connection FUNCTION
_______________________________________________________________________________________
3
8-Bit Parallel DAC in QSOP-16 Package MAX5480
_______________Detailed Description
The MAX5480 is an 8-bit multiplying digital-to-analog converter (DAC) that consists of a thin-film R-2R resistor array with CMOS current steering switches. Figure 3 shows a simplified schematic of the DAC. The inverted R-2R ladder divides the voltage or current reference in a binary manner among the eight steering switches. The magnitude of the current appearing at either OUT terminal depends on the number of switches selected; therefore, the output is an analog representation of the digital input. The two OUT terminals must be held at the same potential so a constant current is maintained in each ladder leg. This makes the REF input current independent of switch state and also ensures that the MAX5480 maintains its excellent linearity performance.
VREF VDD
15 REF DATA INPUTS 4-11 D7-D0 12 13
R1 2k
14 VDD RFB
16 1
R2 1k 10pF
MAX4330
OUT1 OUT2
VOUT
CS WR
MAX5480
GND 3
2
Interface-Logic Information
Mode Selection The inputs CS and WR control the MAX5480's operating mode (see Table 1). Write Mode When CS and WR are both low, the MAX5480 is in write mode, and its analog output responds to data activity at the D0-D7 data-bus inputs. In this mode, the data latches are transparent (see Tables 2 and 3). Hold Mode In hold mode, the MAX5480 retains the data that was present on D0-D7 just prior to CS or WR assuming a high state. The analog output remains at the value corresponding to the digital code locked in the data latch.
R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
Figure 1. Unipolar Binary Operation (Two-Quadrant Multiplication)
16 REF INPUT* 1 RFB OUT1
+5V 14 VDD REF 15 OUTPUT VOLTAGE (10k OUTPUT RESISTANCE)
2
MAX5480
OUT2 WR CS 13 12 GND 3 D7-D0 4-11 DATA IN
__________Applications Information
Using the MAX5480 in VoltageOutput Mode (Single Supply)
The MAX5480 can be used either as a current-output DAC (Figures 1 and 6) or as a voltage-output DAC (Figures 2 and 5). To use the MAX5480 in voltage mode, connect OUT1 to the reference input and connect OUT2 to ground. REF, now the DAC output, is a voltage source with a constant output resistance of 10k (nominally). This output is often buffered with an op amp (Figure 5). An advantage of voltage-mode operation is singlesupply operation for the complete circuit; i.e., a negative reference is not required for a positive output. It is important to note that the range of the reference is restricted in voltage mode. The reference input (voltage at OUT1) must always be positive and is limited to no more than VDD - 3V. If the reference voltage exceeds this value, linearity is degraded.
4
*(VDD - 3V, max)
Figure 2. Typical Operating Circuit (Voltage Mode--Unbuffered)
Table 1. Mode-Selection Table
CS L H X WR L X H MODE Write Hold Hold DAC Response DAC responds to data bus (D0-D7) inputs. Data bus (D0-D7) is locked out; DAC holds last data present when CS or WR assumed high state.
L = Low State, H = High State, X = Don't Care
_______________________________________________________________________________________
8-Bit Parallel DAC in QSOP-16 Package MAX5480
Table 2. Unipolar Binary Code Table
DIGITAL INPUT MSB LSB 11111111 ANALOG OUTPUT
Table 3. Bipolar (Offset Binary) Code Table
DIGITAL INPUT MSB LSB 11111111 ANALOG OUTPUT
255 -VREF 256 129 -VREF 256 128 VREF -VREF =- 2 256 127 -VREF 256 1 -VREF 256 0 -VREF =0 256
127 +VREF 128 1 +VREF 128
10000001
10000001
10000000
10000000
0 1 -VREF 128
127 -VREF 128 128 -VREF 128
01111111
01111111
00000001
00000001
00000000
00000000
1 NOTE : 1 LSB = 2 -8 VREF = VREF 256
(
)
(
)
1 NOTE : 1 LSB = 2 -7 VREF = VREF 128
(
)
(
)
tCS
10k REF 20k S8 20k S7 20k S6 20k S1 20k 10k 10k
tCH
VDD
CS 0 tWR WR 0
OUT2 OUT1 RFB
VDD
tDS tDH DATA IN (D7-D0) VIH VIL VDD DATA IN STABLE 0
CS WR D7 (MSB)
10k INTERFACE LOGIC
D6
D5
D0 (LSB)
NOTES: 1. FOR THE MAX5480, ALL INPUT SIGNAL RISE AND FALL TIMES ARE MEASURED FROM 10% TO 90% OF VDD. VDD = +5V, tr = tf = 20ns. 2. TIMING MEASUREMENT REFERENCE LEVEL IS (VIH + VIL) / 2.
Figure 3. MAX5480 Functional Diagram
Figure 4. Write-Cycle Timing Diagram
_______________________________________________________________________________________
5
8-Bit Parallel DAC in QSOP-16 Package MAX5480
+5V 0.1F
VIN
N.C. 16 VOUT +1.2V RFB 1 OUT1
MAX6120
GND
14 VDD REF 15
MAX4330
0V VOUT 2.4V (255/256)
MAX5480
2 OUT2 WR 13 12 CS 3 GND D7-D0 4-11 10k DATA IN 10k
Figure 5. Single-Supply Voltage-Output Mode (Buffered)
10V (AC OR DC) VREF VDD R5 20k R1 2k R2 1k C1
A1 1/2 MXL1013
R3 20k
A1 1/2 MXL1013
15 REF DATA INPUTS 4-11 D7-D0 12 13
14 VDD RFB 16
OUT1
1 2
R4 10k 0 TO -VREF
VOUT
CS WR
MAX5480
GND 3
OUT2
R6 5k
GND
NOTES: 1. ADJUST R1 FOR VOUT = 0V AT CODE 10000000. 2. C1 PHASE COMPENSATION (10pF to 15pF) MAY BE REQUIRED IF A1 IS A HIGH-SPEED AMPLIFIER.
Figure 6. Bipolar (Four-Quadrant) Operation
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


▲Up To Search▲   

 
Price & Availability of MAX5480

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X